The present invention relates to charge pump circuits. More particularly, the present invention relates to a charge pump circuit having very low output voltage ripple.
The demand for less expensive, and yet more reliable integrated circuit components for use in communication, imaging and high-quality video applications continues to increase rapidly. As a result, integrated circuit manufacturers are requiring improved performance in the voltage supplies and references for such components and devices to meet the design requirements of such emerging applications.
One device utilized for providing a regulated voltage supply is a charge pump circuit. Charge pumps are DC/DC converters that utilize a capacitor instead of an inductor or transformer for energy storage, and are configured for generating positive or negative voltages from the input voltage. A common type of charge pump utilized in circuits comprises one configured for doubling the input voltage, i.e., a charge pump voltage doubler, while other frequently utilized charge pumps comprises tripler and inverter configurations. These charge pumps can operate to multiply the input voltage by some factor, such as by one-half, two, or three times or any other suitable non-integer or factor of the input voltage, to generate the desired output voltage.
Charge pumps typically utilize transistors and/or diodes as switching devices to provide current paths for charge transfer. For example, with reference to FIG. 1, a conventional positive charge pump 100 configured as a voltage doubler is illustrated. Charge pump doubler 100 comprises four switches M1, M2, M3 and M4, a pump capacitor CPUMP, and an output or reservoir capacitor COUT. The charging and discharging current of capacitor CPUMP is determined by the output load requirements, e.g., by the output load current ILOAD.
Charge pump doubler 100 is typically configured by a clock having a 50% duty cycle, i.e., a clock having a clock phase-A and phase-B. During clock phase-A, switches M1 and M2 are turned xe2x80x9conxe2x80x9d to charge capacitor CPUMP to approximately the supply voltage VIN, while switches M3 and M4 remain in an xe2x80x9coffxe2x80x9d condition. During clock phase-B, switches M3 and M4 are turned xe2x80x9conxe2x80x9d, while switches M1 and M2 are turned xe2x80x9coffxe2x80x9d, to charge output capacitor COUT to a higher voltage potential.
If the output voltage VOUT is not otherwise regulated, output voltage VOUT will reach a value of approximately twice the supply voltage VIN if load current ILOAD is small. Further, the frequency of the refresh cycle, i.e., the frequency of the charging of output capacitor COUT by charge capacitor CPUMP, can be suitably adjusted depending on the circuit load such that power efficiency can be maximized. However, this approach still produces a substantial amount of voltage ripple because output capacitor COUT is only being refreshed 50% of the time, and thus the output load causes the output voltage VOUT to drop below its ideal unloaded voltage value. Further, this approach is highly susceptible to the ESR of output capacitor COUT. In other words, the ESR of output capacitor COUT causes additional output ripple as a result of the recharging current that occurs during the output refreshing periods.
Another approach to limit the level of voltage ripple to a tolerable level can include configuring the reservoir or output capacitor with a larger capacitance value. However, such an arrangement is not desirable in that such a larger value capacitor results in a larger total printed circuit board area and higher manufacturing costs.
Yet another approach to reducing the voltage ripple at the output of a charge pump includes the implementation of two charge pump capacitors that alternately refresh an output capacitor. For example, with reference to FIG. 2, a charge pump circuit 200 that comprises two flying charge pump capacitors, CF1 and CF2, is illustrated. In this example, charge pump circuit 200 is configured with two control paths, with the charge pump output current split into two parts, ICONT and IBASIC, and with current ICONT and IBASIC being made proportional to ILOAD using a linear regulator 202.
While this approach can improve the charge pump output ripple, charge pump circuit 200 still produces a significant amount of voltage ripple due to the existence of an amount of dead time when neither of charge pump capacitors CF1 and CF2 are refreshing output capacitor COUT, i.e., the switching between charge pump capacitors CF1 and CF2 results in a period of time when no refreshing of output capacitor COUT occurs. In addition, mismatch between output current parts, ICONT1 and ICONT2, can cause additional error that results in additional output voltage ripple.
Yet another approach includes the implementation of a charge pump doubler, the output of which is followed by a low dropout regulator (LDO). For example, with reference to FIG. 3, a charge pump circuit 300 is configured to provide a boosted output provided by a charge pump doubler 302, and then convert the boosted output with a low dropout regulator 304 to a low noise regulated output. However, to produce a low voltage output ripple at output terminal VOUT, low dropout regulator 304 has to reject the large ripple on the output of the charge pump doubler at large load currents, which is a difficult task. In addition, this approach is susceptible to any increases in output ripple because the input supply current to charge pump 300 can become quite noisy, and thus the high frequency line rejection characteristics of low dropout regulator 304 become of vital importance. As a result, to maintain low output ripple, the supply current that the low dropout regulator requires can increase as the load current increases so that the low dropout regulator can reject the larger voltage ripple from the charge pump doubler.
Furthermore, charge pump circuit 300 can produce voltages that are significantly higher than the maximum process voltage, i.e., charge pump circuit 300 can require a significantly higher voltage process since the input voltage VIN is doubled. For example, for a 4.4 volt input VIN, charge pump circuit 300 needs to support 8.8 volts at the output capacitor C3, which is significantly higher than the desired output voltage of 5.0 volts at the output VOUT. Thus, the voltage across some of the devices within the charge pumps may exceed the maximum allowable voltage for a given process. Accordingly, processes with higher breakdown voltages may be required for charge pump regulator 300 when implemented within integrated circuit applications, thus resulting in increased costs and circuit size compared to circuits implemented in low voltage processes.
Accordingly, a need exists for an improved charge pump circuit configured for providing a very low output ripple.
The method and circuit according to the present invention addresses many of the shortcomings of the prior art. In accordance with one aspect of the present invention, a charge pump circuit is configured to provide very low ripple as compared to that provided by the prior art charge pump circuits through continuous control of the output of the charge pump circuit. In accordance with an exemplary embodiment, a charge pump circuit is configured for continuous control of the output of the charge pump circuit through continuous use of at least one level-shifting device, such as a charge pump capacitor, coupled with a servo amplifier. During both phases of operation of the charge pump circuit, as well as during the switching phase, the output current from the servo amplifier can be set equal to the load current through a continuous feedback configuration. This servo amplifier configuration facilitates the continuous regulation of the load current, and as a result no load current is drawn from the output capacitor, thus requiring no recharge of the output capacitor.
In accordance with another aspect of the present invention, an exemplary charge pump circuit can be configured with level-shifting capabilities. In accordance with an exemplary embodiment, a first pump capacitor and a second pump capacitor facilitates the level shifting characteristics utilized by the servo amplifier output therefore allowing the output voltage of the charge pump circuit to be higher or lower than the input supply coupled to the charge pump circuit.
In accordance with various other aspects of the present invention, an exemplary charge pump circuit can be configured to facilitate the use of lower voltage processes, as well as providing a large DC open loop gain and good stability. In addition, an exemplary charge pump circuit can be configured with capabilities for buck/boost operation.